1) Field of the Invention
This invention relates to the field of semiconductor devices. More particularly, the invention relates to a method and apparatus for allowing phase conflicts between phase shifting regions in a phase shifting mask to be used in optical lithography processes for manufacturing integrated circuit devices.
2) Description of the Prior Art
Semiconductor devices continue to be produced at reduced sizes as optical lithography processes have evolved. Techniques such as phase shifting have been developed to assist in the production of subwavelength features on the integrated circuits (IC) using optical lithography processes. Subwavelength features are features that are smaller than the wavelength of light used to create circuit patterns in the silicon. More generally, phase shifting can be used to create features smaller than a minimum realizable dimension for the given process.
Through the use of phase shifting masks, such subwavelength features can be efficiently produced. (Note, that the term “mask” as used in this specification is meant to include the term “reticle.”) One approach to producing a phase shifting mask (PSM) is to use destructive light interference caused by placing two, out of phase, light transmissive areas in close proximity in order to create an unexposed region on a photoresist layer of an IC. If that unexposed area is then protected from exposure when a binary mask is used to expose the remaining field (thus causing definition of the remaining structure), the resultant IC will include subwavelength features created by the PSM.
One approach to preparing an IC for production using PSMs is for one or more features of the IC to be identified for production using PSMs. For example, a designer might identify one or more particular features for production using the PSM, e.g. to define the identified lines (gates or other features) at subwavelength sizes.
Methods to design phase shift masks need to be improve to better define smaller features such as line ends.
Relevant technical developments in the literature can be gleaned by considering the following. U.S. Pat. No. 6,664,009 (Liu) shows an alternating phase shift mask process.
U.S. Pat. No. 6,553,560—Ma, et al.—Alleviating line end shortening in transistor endcaps by extending phase shifters.
U.S. Pat. No. 6,711,732—Dai, et al.—Full sized scattering bar alt-PSM technique for IC manufacturing in sub-resolution era.
U.S. Pat. No. 6,623,895—Chen, et al. shows a Hybrid phase-shift mask.
U.S. Pat. No. 6,214,494 B1—Bula et al.—shows a method to add serifs to line ends.
U.S. Pat. No. 6,470,489 B1 (Chang et al. ) shows an OPC method.